Patent · US Active

Accelerating functional verification of an integrated circuit

US9171110B2 · kind B2 · utility

3Cited by

4References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Michael Deindl · Lörrach, DE
Jeffrey Joseph Ruedinger · Rochester, US
Christian Zoellin · Waiblingen, DE

Key dates

Filing date	Jun 27, 2012
Grant date	Oct 27, 2015
Priority date	—
Expiry date	Mar 17, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/331
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.