Patent · US Active

Data and key separation using a secure central processing unit

US9171170B2 · kind B2 · utility

1Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 6, 2012
Grant dateOct 27, 2015
Priority date
Expiry dateOct 14, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2221/2113
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A computing system, comprising includes a first central processing unit (CPU) and a second CPU coupled with the first CPU and with a host processor. The second CPU and the host processor may both request the first CPU to generate keys that have access rights to regions of memory to access specific data. The first CPU may be configured to, in response to a request from the second CPU, generate a unique key with a unique access right to a region of memory, the unique key usable only by the second CPU, not the host processor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.