Stacked leaded array
US9171672B2 · kind B2 · utility
14Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2012 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Dec 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/38
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A stacked leaded array is provided wherein the stacked leaded array allows for increased packing density of electronic components. The stacked leaded array has a multiplicity of electronic components in a stacked array. Each electronic component comprises a first termination and a second termination. A multiplicity of first leads are provided wherein each first lead is in electrical contact with at least one first termination. Second leads are in electrical contact with second terminations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.