Semiconductor device and manufacturing method for the same
US9171767B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2014 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Nov 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.