Electrostatic discharge shunting circuit

US9171963B2 · kind B2 · utility

Assignee

• University of Central Florida Research Foundation · US

Inventors

• Qiang CUI · Baiyin, CN
• Juin J. Liou · Oviedo, US

Key dates

• Filing date: Mar 29, 2012
• Grant date: Oct 27, 2015
• Expiry date: Mar 5, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002

Abstract

An integrated electrostatic discharge (ESD) shunting circuit includes a III-V semiconductor layer, and a first drain-less high electron mobility transistor (HEMT) or a metal-semiconductor FET (MESFET) transistor having a first gate and at least a second drain-less HEMT or MESFET having a second gate formed in the substrate. The HEMTs or MESFETs include a donor layer on the semiconductor layer, no drains, and a source including an ohmic contact layer on the donor layer.