Self biased electro-static discharge clamp (ESD) for power rail
US9172244B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 30, 2014 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | May 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/819
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit with an electro-static discharge clamp coupled to a first power source and second power source. The electro-static discharge clamp includes an NMOS stack and an electro-static discharge detector. The NMOS stack has a first NMOS transistor with a first gate node and a second NMOS transistor with a second gate node. The electro-static discharge detector is configured to control the NMOS stack, and may include three switches. A first switch is configured to switch the first gate node to the second power source. A second switch is configured to switch the first gate node to the second gate node. A third switch is configured to switch the first gate node to the ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.