Crystal oscillator circuit having low power consumption, low jitter and wide operating range
US9172327B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 15, 2013 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Nov 15, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/0094
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A crystal oscillator circuit includes: a crystal resonator circuit, generating an oscillation signal; an inverting amplification circuit, whose amplifier input end is coupled to receive the oscillation signal, in which an inverting amplifier outputs an inverting amplified output signal; a bias circuit, having a bias circuit input end and a bias circuit output end, in which the bias circuit output end generates a bias circuit output signal controlled by the bias circuit input end, and the bias circuit output signal is coupled to a second control end of the inverting amplification circuit; and a peak detection circuit, comparing the inverting amplified output signal with a reference signal, regulating a peak detector output signal, and feeding the peak detector output signal into the bias circuit input end.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.