Optimizing bias points for a semiconductor device
US9176558B2 · kind B2 · utility
0Cited by
6References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 29, 2009 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Oct 7, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a method includes determining environmental conditions associated with operation of a chip having multiple device types, accessing a table stored in the chip based on the determined environmental conditions, and dynamically operating the chip at a bias point accessed from the table based on the determined environmental conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.