Patent · US Active

Address resource mapping in a shared memory computer system

US9176669B2 · kind B2 · utility

0Cited by

5References

21Claims

0Family size

Assignee

SILICON GRAPHICS INTERNATIONAL CORP. · US

Inventors

Brian J. Johnson · Rosemount, US
Michael John Habeck · Eagan, US

Key dates

Filing date	Mar 15, 2013
Grant date	Nov 3, 2015
Priority date	—
Expiry date	Oct 4, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F12/0284
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An algorithm for mapping memory and a method for using a high performance computing (“HPC”) system are disclosed. The algorithm takes into account the number of physical nodes in the HPC system, and the amount of memory in each node. Some of the nodes in the HPC system also include input/output (“I/O”) devices like graphics cards and non-volatile storage interfaces that have on-board memory; the algorithm also accounts for the number of such nodes and the amount of I/O memory they each contain. The algorithm maximizes certain parameters in priority order, including the number of mapped nodes, the number of mapped I/O nodes, the amount of mapped I/O memory, and the total amount of mapped memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.