Memory controller controlling a nonvolatile memory
US9176863B2 · kind B2 · utility
2Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2012 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Dec 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is a memory controller interfacing with a host and a nonvolatile memory. The memory controller may include a buffer unit configured to store an input address table and a first hot address table; and a processing unit configured to judge whether an address from the host coincides with one of addresses stored in the input address table and to store the address from the host in the first hot address table according to the judgment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.