Memory circuit with switch between sense amplifier and data line and method for operating the same
US9177631B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 27, 2010 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit includes at least one first memory cell of a first memory array for storing a first datum. The at least one first memory cell is coupled with a first word line and a first bit line. A first bit line bar is disposed substantially parallel with the first bit line. A first switch is coupled between a sense amplifier and the first bit line bar. The first switch can electrically isolate the sense amplifier from the first bit line bar if the sense amplifier is capable of sensing a first voltage difference between the first bit line. The first bit line bar and the first voltage difference is substantially equal to or larger than a predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.