Semiconductor device having non-volatile memory with data erase scheme
US9177657B2 · kind B2 · utility
1Cited by
3References
10Claims
0Family size
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Key dates
| Filing date | Aug 29, 2012 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Aug 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile memory device (4) provided in a semiconductor device, when data is erased based on a band-to-band tunneling scheme, supply of a boosted voltage to a memory cell (MC) to be erased is ended when a condition that an output voltage (VUCP) of a charge pump circuit (52) has recovered to a predetermined reference voltage is satisfied and additionally a condition that a predetermined reference time has elapsed since start of supply of the boosted voltage (VUCP) to the memory cell (MC) to be erased is satisfied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.