Semiconductor test device and method for fabricating the same
US9177887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2013 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Apr 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor test devices and methods for fabricating the same may be provided. The semiconductor test device may include a first thermal test flip chip cell including a first heater and a first sensor, and a test substrate formed under the first thermal test flip chip cell. The first thermal test flip chip cell may include a plurality of first bumps arranged on a bottom surface of the first thermal test flip chip cell and be configured to be electrically connected to the first heater and the first sensor. The test substrate may include a first ball array arranged on a bottom surface of the test substrate in a first direction and be configured to be electrically connected to the plurality of first bumps, which are electrically connected to the first heater and the first sensor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.