Memory device
US9177997B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2012 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Nov 8, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/73
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Microelectronic device, comprising a substrate, a first electrode arranged above the substrate, a first resistive switch and a resistivity structure coupled with each other, wherein the first resistive switch and the resistivity structure are arranged in a single layer of the device, and a second electrode arranged above the layer that includes the first resistive switch and the resistivity structure, wherein the first resistive switch and the resistivity structure are coupled with the first and the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.