Signal line structure of a flat display
US9182641B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2011 |
| Grant date | Nov 10, 2015 |
| Priority date | — |
| Expiry date | Jun 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The signal line structure is disposed between a gate driver and a display area of a display. The signal line structure includes a substrate, first metal layers, a first insulation layer, second metal layers, a second insulation layer and third metal layers. The first metal layers are arranged in parallel and toward a first direction in the substrate. The first insulation layer is disposed in the substrate and covers the first metal layers. The second metal layers are disposed on the positions of the first insulation layer corresponding to the first metal layers. The second insulation layer is disposed on the second metal layers and the first insulation layer. The third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer. The distance between two adjacent second metal layers is less than that between two adjacent first metal layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.