Patent · US Active

Local clearing control

US9182984B2 · kind B2 · utility

18Cited by
35References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 15, 2012
Grant dateNov 10, 2015
Priority date
Expiry dateDec 24, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/1027
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer implemented instruction is executed. One or more translation table entry locations (TLB) are specified by the instruction. Based on a local-clearing (LC) control specified by the instruction being a first value, the processor selectively clears TLBs in a plurality of the CPUs in a configuration of entries corresponding to the determined translation table entry location. Based on the local-clearing (LC) being a second value, the processor selectively clears only the TLBs of the CPU executing the instruction of entries corresponding to the determined translation table entry location. A computer program product, computer system and computer implemented method are provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.