Thread cache allocation
US9183151B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2013 |
| Grant date | Nov 10, 2015 |
| Priority date | — |
| Expiry date | Mar 21, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and techniques are described for thread cache allocation. A described technique includes monitoring input and output accesses for a plurality of threads executing on a computing device that includes a cache comprising a quantity of memory blocks, determining a respective reuse intensity for each of the threads, determining a respective read ratio for each of the threads, determining a respective quantity of memory blocks for each of the partitions by optimizing a combination of cache utilities, each cache utility being based on the respective reuse intensity, the respective read ratio, and a respective hit ratio for a particular partition, and resizing one or more of the partitions to be equal to the respective quantity of the memory blocks for the partition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.