Semiconductor device with gate electrodes buried in trenches
US9184285B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2013 |
| Grant date | Nov 10, 2015 |
| Priority date | — |
| Expiry date | Mar 27, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
Trenches are formed in a base layer and extend parallel to each other. A gate insulating film is formed on the inner wall of each of multiple trenches. A gate electrode GE is buried in each of the trenches. The source layer is formed in the base layer to a depth less than the base layer. The source layer is disposed between each of the trenches. A second conduction type high concentration layer is formed between the source layer and the trench in a plan view. The trench, the source layer, and the second conduction type high concentration are arranged in this order repetitively in a plan view. One lateral side of the trench faces the source layer and the other lateral side of the trench faces the second conduction type high concentration layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.