Variable dynamic range receiver
US9184756B2 · kind B2 · utility
0Cited by
2References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2010 |
| Grant date | Nov 10, 2015 |
| Priority date | — |
| Expiry date | Feb 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/0035
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention may provide a signal processing circuit that may comprises an analog-to-digital converter (ADC), and an output restriction circuit. The output restriction circuit may reduce the accuracy of the digital output of the ADC when signal content exceeds a pre-determined spectrum mask in an undesirable band. In one embodiment, the input signal spectrum may be actively monitored and when the input spectrum is inconsistent with an intended application, the output resolution may be restricted, for example, by truncating least significant bits (LSBs) of the digital output or adding digital noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.