Memory system
US9190155B2 · kind B2 · utility
2Cited by
0References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2014 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | Jan 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.