High-K dielectric layer based semiconductor structures and fabrication process thereof
US9190282B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2012 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | May 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for fabricating a semiconductor structure. The method includes providing a semiconductor substrate, forming a first dielectric layer on a surface of the semiconductor substrate based on a first-type oxidation, and forming a high-K dielectric layer on a surface of the first dielectric layer. The method also includes performing a first thermal annealing process to remove the first dielectric layer between the semiconductor substrate and the high-K dielectric layer such that the high-K dielectric layer is on the surface of the semiconductor substrate. Further, the method includes performing a second thermal annealing process to form a second dielectric layer on the surface of the semiconductor substrate between the semiconductor substrate and the high-K dielectric layer, based on a second-type oxidation different from the first-type oxidation, such that high-K dielectric layer is on the second dielectric layer instead of the first dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.