Packaging for an electronic device
US9190606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | May 31, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.