Hardware-efficient on-chip calibration of analog/RF through sub-sampling
US9194911B2 · kind B2 · utility
1Cited by
2References
15Claims
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Key dates
| Filing date | Dec 31, 2011 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jan 14, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31813
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A digital on-die-test engine (OTE) generates stimuli signals for an analog/RF circuit, where the OTE is embedded within the circuitry. The stimuli signals are injected into the circuit, feed through the circuit, and are received back into the OTE for analysis. The OTE includes an input subsystem to receive signals from various locations throughout the circuit. The received signals are sub-sampled before being tested. The OTE includes memory-aware and memory-less algorithms for testing the signals. The OTE is capable of changing the configuration of the circuit, where needed, following the tests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.