Sleep mode circuit and a method for placing a circuit into sleep mode
US9195298B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2013 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Apr 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0016
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A first circuit is configured to communicatively couple to a second circuit including an analog circuit and a digital circuit. The first circuit comprises a lock unit and a sleep unit. The lock unit is configured to receive a lock enable signal and to lock a configuration signal of the digital circuit in response to the lock enable signal. The sleep unit is configured to receive a sleep triggering signal indicating to switch into sleep mode and to generate an off signal to switch off the digital circuit in response to the sleep triggering signal, while the analog circuit remains on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.