Mixer
US9197159B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 29, 2015 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jan 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/38
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mixer includes a first node to which an intermediate frequency (IF) signal is input; first and second transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the first node; a first filter that is connected between the output terminal of the second transistor and the first node and suppresses passage of the IF signal; a second node to which the IF signal is input; third and fourth transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the second node; a second filter that is connected between the output terminal of the fourth transistor and the second node and suppresses passage of the IF signal; and a combiner combining a signal output from the first node and a signal output from the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.