Patent · US Active

High speed level shifter with amplitude servo loop

US9197214B2 · kind B2 · utility

0Cited by

11References

20Claims

0Family size

Assignee

Broadcom Corporation · US

Inventors

Ali Nazemi · Aliso Viejo, US
Kangmin Hu · Santa Clara, US
Jun Cao · Irvine, US
Afshin Momtaz · Irvine, US

Key dates

Filing date	Sep 12, 2013
Grant date	Nov 24, 2015
Priority date	—
Expiry date	Sep 12, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/018507
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A high speed level shifter interfaces a high speed DAC to the digital information that the DAC processes. The level shifter may convert CMOS level digital representations to, for example, CML level digital representations for processing by the DAC. The level shifter conserves the voltage swing in the CMOS level representations (e.g., about 1V). The level shifter also avoids voltage overstress, using a feedback loop to constrain the voltage amplitude, and thereby facilitates the use of fast thin film transistors in its architecture.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.