Timing error detector for adverse channel conditions
US9201148B1 · kind B1 · utility
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4References
9Claims
0Family size
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Key dates
| Filing date | May 24, 2010 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Nov 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/70715
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In a receive system, a plurality of correlators correlate a received signal with a plurality of delayed versions of a reference signal to generate a plurality of correlator outputs. A timing error detector estimates an optimal timing based on a set of correlator outputs, and determines a timing error based on (i) the estimated optimal correlation point and (ii) an existing timing, such that the timing error is hard or soft limited between two positive thresholds and two negative thresholds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.