Fault tolerant architecture for distributed computing systems
US9201744B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2014 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Dec 2, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/805
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed here is a fault tolerant architecture suitable for use with any distributed computing system. A fault tolerant architecture may include any suitable number of supervisors, dependency managers, node managers, and other modules distributed across any suitable number of nodes. In one or more embodiments, supervisors may monitor the system using any suitable number of heartbeats from any suitable number of node managers and other modules. In one or more embodiments, supervisors may automatically recover failed modules in a distributed system by moving the modules and their dependencies to other nodes in the system. In one or more embodiments, supervisors may request a configuration package from one or more dependency managers installing one or more modules on a node. In one or more embodiments, one or more modules may have any suitable number of redundant copies in the system, where redundant copies of modules in the system may be stored in separate nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.