Non-volatile memory device and programming method using fewer verification voltages than programmable data states
US9202576B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2014 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Apr 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a non-volatile memory device includes; defining a set of verification voltages, setting a maximum verification voltage among verification voltages that are less than or equal to a first target programming voltage to be a target verification voltage, calculating a number of extra pulses based on the target verification voltage and the first target programming voltage, verifying whether a threshold voltage of the memory cell is equal to or greater than the target verification voltage by applying an incremental step pulse program (ISPP) pulse to the memory cell and then applying at least one verification voltage in the set of verification voltages to the memory cell, and further applying the ISPP pulse to the memory cell a number of times equal to the number of extra pulses when the threshold voltage is verified to be equal to or greater than the target verification voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.