Trench high electron mobility transistor device
US9202888B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Jun 17, 2014 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Jul 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/08
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing a solid state device, including forming a first dielectric layer over an epitaxial layer at least partially covering the a Silicon substrate and depositing a photoresist material thereover, removing a predetermined portion first dielectric layer to define an exposed portion, implanting dopants into the exposed portion to define a doped portion, preferentially removing Silicon from the exposed portion to generate trenches having V-shaped cross-sections and having first and second angled sidewalls defining the V-shaped cross-section, wherein each angled sidewall defining the V-shaped cross-section is a Silicon face having a 111 orientation, and forming a 2DEG on at least one sidewall.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.