Diplexer design using through glass via technology
US9203373B2 · kind B2 · utility
5Cited by
23References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Aug 15, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49128
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A diplexer includes a substrate having a set of through substrate vias. The diplexer also includes a first set of traces on a first surface of the substrate. The first traces are coupled to the through substrate vias. The diplexer further includes a second set of traces on a second surface of the substrate that is opposite the first surface. The second traces are coupled to opposite ends of the set of through substrate vias. The through substrate vias and the traces also operate as a 3D inductor. The diplexer also includes a capacitor supported by the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.