Functional device and test mode activation circuit of the same
US9203390B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 15, 2014 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Aug 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1252
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A test mode activation circuit that includes a clock signal generating module, a resistor-capacitor circuit, a current generating module, an output capacitor and a comparator is provided. The clock signal generating module generates a clock signal to an input node such that the resistor-capacitor circuit electrically connected to the input node receives the clock signal to generate a triggering signal every predetermined time interval. The current generating module generates a charging current to an output node in response to the triggering signal. The output capacitor receives the charging current from the output node such that an output voltage of the output node gradually increases. The comparator receives the output voltage from the output node and a reference voltage, wherein the comparator compares the output voltage and the reference voltage to generate a test mode activation signal when the output voltage is larger than the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.