Gate driver and a display device including the same
US9203395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2013 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Dec 6, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/041
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver includes a plurality of stages, wherein an n-th stage includes: a pull-up unit configured to output a high voltage of a clock signal as a high voltage of an n-th gate signal; a pull-down unit configured to decrease the high voltage of the n-th gate signal to a first low voltage; a discharging unit configured to discharge a voltage of the first node to a second low voltage lower than the first low voltage; a carry unit configured to output the high voltage of the clock signal as an n-th carry signal; an inverter unit configured to output a signal in synchronization with the clock signal; a first node storage unit configured to maintain the voltage of the first node at the second low voltage; and a second node storage unit configured to maintain the voltage of the second node at the first or second low voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.