Inhibiting background plating
US9206520B2 · kind B2 · utility
25Cited by
26References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2009 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Mar 5, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/50
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Methods include selectively depositing a phase change resist having high light transmittance onto a dielectric to form a pattern, etching away portions of the dielectric not covered by the resist and depositing a metal seed layer on the etched portions of the dielectric. A metal layer is then deposited on the metal seed layer by light induced plating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.