Patent · US Active

Allocation of memory space to individual processor cores

US9208093B2 · kind B2 · utility

3Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 21, 2009
Grant dateDec 8, 2015
Priority date
Expiry dateSep 26, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5016
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Techniques are generally described for a multi-core processor with a plurality of processor cores. At least one cache is accessible to at least two of the plurality of processor cores. The multi-core processor can be configured for separately allocating a memory space within the cache to the individual processor cores accessing the cache.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.