Method of producing encapsulated IC devices on a wafer
US9209047B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2014 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Mar 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/013
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This method of waferscale packaging produces finished integrated circuits (ICs) individually completely encapsulated with environmentally protective packaging material while still in the wafer format. Following conventional semiconductor fabrication of chips at the wafer level and prior to their separation, a first polymer is applied to the front surface of the wafer with allowance for contact holes. A carrier wafer is attached to the exposed polymer. The original substrate is removed and the devices are separated by cutting through the semiconductor layer and the first polymer. A second polymer is applied to cover the exposed backside of the devices and to fill the cut spaces between them, thereby sealing the remaining five surfaces of the chips. The second polymer layer may also include contact holes for access to the back side of the device chips. A second singulation cutting leaves the chips on the wafer prepared for a pick-and-place operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.