Hardware compression to find backward references with multi-level hashes
US9209831B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2015 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Mar 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3088
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Concurrently writing an uncompressed data element, if the uncompressed data element comprises an indication that it is valid, in a main hash table using a first address generated by a first hash function, and reading a first data element from the main hash table using the first address. Introducing a first pipeline delay for maintaining the uncompressed data element in a first data path until the first data element is read. Concurrently writing the first data element to a victim hash table, if the first data element comprises an indication that it is valid, using a second address generated by a second hash function, and reading a second data element from the victim hash table using a third address generated by the second hash function. Introducing a second pipeline delay for maintaining the uncompressed data element in the first data path until the second data element is read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.