Low-dropout regulator, power management system, and method of controlling low-dropout voltage
US9213347B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2014 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Nov 29, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A low-dropout regulator comprises an analog-to-digital converter that converts a feedback analog voltage signal into a digital signal, a phase synthesizing unit that generates a first control signal having a pulse width corresponding to error information in the digital signal by performing phase synthesis according to clock skew control, a charge pump circuit that selects a charge loop or a discharge loop based on polarity information in the digital signal, and generates an output control voltage according to current that flows during a period corresponding to the pulse width of the first control signal in the selected loop, and an output circuit that generates an output voltage based on an input voltage and the output control voltage, and generates the feedback analog voltage signal based on the output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.