Storing data in any of a plurality of buffers in a memory controller
US9213545B2 · kind B2 · utility
3Cited by
9References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2010 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Jan 10, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller containing one or more ports coupled to a buffer selection logic and a plurality of buffers. Each buffer is configured to store write data associated with a write request and each buffer is also coupled to the buffer selection logic. The buffer selection logic is configured to store write data associated with a write request from at least one of the ports in any of the buffers based on a priority of the buffers for each one of the ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.