Memory management unit
US9213650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2014 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Dec 4, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus is provided comprising a plurality of master devices configured to issue memory access requests including virtual addresses. A memory management unit is configured to receive memory access requests and to translate a virtual address included in a memory access request from a requesting master device into a physical address indicating a storage location in memory. The memory management unit has an internal storage unit having a plurality of entries wherein indications of corresponding virtual address portions and physical address portions are stored. The memory management unit is configured to select an entry of the internal storage unit in dependence on the virtual address and an identifier of the requesting master device. Conflict between the master devices in their usage of the internal storage unit is thus avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.