Patent · US Active

Method for manufacturing a semiconductor structure and semiconductor component comprising such a structure

US9214341B2 · kind B2 · utility

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1References

8Claims

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Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

David Vaufrey · Grenoble, FR
Hubert Bono · Grenoble, FR

Key dates

Filing date	Oct 24, 2013
Grant date	Dec 15, 2015
Priority date	—
Expiry date	Oct 24, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/02645
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Method for manufacturing at least one semiconductor structure (130) on the surface (105) of a substrate (100) wherein the surface comprises silicon. The method comprises steps consisting of providing the substrate (100), forming in contact with an area (101) of the surface (105), referred to as the formation area, a layer (120) of a first material, the remainder (102) of the surface (105), referred to as the free area, remaining free from the first material, the dimensions of the formation area (101) and the first material being suitable for forming the structure (130), the first material comprising gallium, the formation of said layer (120) taking place at a temperature less than 600° C., and forming the structure (130) in contact with the layer (120).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.