Thin film transistor with two-dimensional doping array
US9214568B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 12, 2013 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Jan 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6745
Abstract
A thin film transistor includes: a source region; a drain region; and a polycrystalline thin film active channel region connected to the source region and the drain region, the active channel region comprising grains and being doped with a two-dimensional pattern comprising a plurality of doped regions, the plurality of doped regions each comprising at least portions of a plurality of the grains and at least one grain boundary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.