Phase locked loop circuit
US9214946B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2013 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Dec 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0895
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase locked loop circuit is provided which includes a bang-bang phase frequency detector configured to receive a reference signal and a feedback signal, detect a phase difference between the reference signal and the feedback signal, output a detection signal on the based on a result of the detection; an analog-digital mixed filter configured to receive the detection signal and output a control signal on the basis of the received detection signal; a voltage controlled oscillator configured to output an output signal in response to the control signal; and a divider configured to divide the output signal by n to output as the feedback signal. The detection signal is a digital signal, and the control signal is an analog signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.