Hardware accelerator for a domain name server cache
US9215205B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 20, 2012 |
| Grant date | Dec 15, 2015 |
| Priority date | — |
| Expiry date | Sep 28, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/1458
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for a hardware accelerator for a domain name server (DNS) cache are disclosed. In some embodiments, a hardware accelerator for a DNS cache includes: executing a packet processing engine of a host device to identify a DNS request; and performing a DNS lookup in the DNS cache. In some embodiments, a hardware accelerator for a DNS cache includes: determining if a time to live (TTL) parameter associated with a first entry stored in the DNS cache is below a threshold value; and if the TTL parameter associated with the first entry stored in the DNS cache is below the threshold value, then performing a pre-fetch operation to update the first entry in the DNS cache, wherein the updated entry comprises an updated TTL value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.