Gate drive circuit and display device having the gate drive circuit
US9218074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2012 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Sep 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate drive circuit in which multiple stages are connected together one after each other. An n-th stage includes a pull-up part, a carry part, a pull-down part, a switching part, a first maintaining part and a second maintaining part. The pull-up part outputs a high voltage of a first clock signal. The carry part outputs a high voltage of the first clock signal. The pull-down part pulls-down the n-th gate signal into a first low voltage. The switching part outputs a first signal synchronized with the first clock signal during an interval other than a high voltage output interval of the n-th carry signal. The first maintaining part maintains the n-th gate signal at the first low voltage in response to the first signal. The second maintaining part maintains the n-th gate signal at the first low voltage in response to a second signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.