Synthetic processing diversity with multiple architectures within a homogeneous processing environment
US9218483B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2013 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Jul 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of increasing processing diversity on a computer system includes: loading a plurality of instruction streams, each of the plurality of instruction streams being equivalent; executing, in a context, a first stream of the plurality of instruction streams; stopping execution of the first stream at a first location of the first stream; and executing, in the context, a second stream of the plurality of instruction streams at a second location of the second stream, the second location corresponding to the first location of the first stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.