Methods and systems for preventing hardware trojan insertion
US9218506B2 · kind B2 · utility
2Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2014 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Mar 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are methods and systems for preventing hardware Trojan insertion. An example method can comprise determining unused space in an integrated circuit (IC), selecting a plurality of built-in self-authentication (BISA) filler cells based on the determined unused space, and placing the selected plurality of BISA filler cells onto the unused space. The plurality of BISA filler cells can be connected to form a plurality of BISA blocks. The plurality of BISA blocks can correspond to a plurality of signatures. A modification of one or more BISA filler cell can lead to an alteration of one or more signatures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.