Gate driving circuit, array substrate, and display apparatus
US9218780B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 12, 2013 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Feb 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a field of displaying, and particularly to a gate driving circuit, an array substrate, and a display apparatus capable of ensuring that noise can be pulled down immediately once it occurs, and thus increasing a quality of picture and reliability of the display apparatus. The gate driving circuit includes a plurality of cascaded shift registers, wherein an output terminal of the shift register is further connected to two Thin Film Transistors TFTs, wherein sources of the two TFTs are both connected to the output terminal of the shift register, drains of the two TFTs are both connected to a first level signal line VSS, and gates of the two TFTs are input to different control signals respectively, thus ensuring that at least one TFT is turned on when the shift register outputs a switching-off voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.