Memory structure and preparation method thereof

US9219099B1 · kind B1 · utility

Assignee

• National Chiao Tung University · TW

Inventors

• Po-Tsun Liu · Hsinchu, TW
• Yang-Shun Fan · Hengshan, TW
• CHUN-CHING CHEN · New Taipei, TW

Key dates

• Filing date: Dec 4, 2014
• Grant date: Dec 22, 2015
• Expiry date: Dec 4, 2034

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2213/79

Abstract

A memory structure includes a control unit and a memory unit electrically connected to the control unit. The control unit includes a source and a drain; an active layer in contact with a portion of the source and a portion of the drain; a gate layer; and a gate insulation layer disposed between the active layer and the gate layer. The memory unit includes a bottom electrode layer; a top electrode layer; and a resistive switching layer interposed between the bottom electrode layer and the top electrode layer, which the resistive switching layer and the active layer are formed of aluminum zinc tin oxide (AZTO).