On-die jitter generator
US9222972B1 · kind B1 · utility
1Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | Sep 17, 2010 |
| Grant date | Dec 29, 2015 |
| Priority date | — |
| Expiry date | Sep 2, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31709
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An IC that includes a jitter generator, where the jitter generator is integral with the IC and generates non-intrinsic jitter, is provided. In one implementation, the non-intrinsic jitter is used to measure a characteristic of the IC. In one implementation, the non-intrinsic jitter is used to test jitter tolerance of the IC. In yet another implementation, the non-intrinsic jitter is used to test another IC coupled to the IC that includes the jitter generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.